The wafers used in microelectronics generally comprise bevelled (or chamfered) edges on their periphery. When two wafers of this type are assembled, for example, in order to form three-dimensional integrated circuits or imaging devices with backside illumination, the bevelled peripheral parts are not maintained. A thinning of one of the two wafers after the assembly can cause a fracture of the bevelled peripheral parts not maintained. One proposed approach is to mechanically cut away (or trim) the bevelled peripheral part of at least one of the two wafers prior to the thinning step. For this purpose, reference may be made to French Patent application FR2860842, which describes a wafer trimming method.
Conventionally, to increase the number of integrated circuits formed on the same wafer, integrated circuits are fabricated up to the periphery of the wafers. Generally, this may be up to 3 millimeters from the edge of the wafer. The implementation of a step for cutting away the bevelled peripheral parts can expose one or more metallization levels of the integrated circuits on a wafer. These metallization levels generally comprise copper, and conventionally, exposed copper can contaminate the equipment in which fabrication steps will be implemented or the semiconductor substrate itself.
One proposed approach is therefore to protect the walls obtained after a step for removal of the bevelled peripheral parts. This may involve depositing a conformal layer of insulating material on the unassembled surface, and on the walls obtained. This approach has a drawback that layers of material that do not require protection are coated, and mechanical stresses can cause defects.
Another approach is to form lateral protections according to a method well known to those skilled in the art that allows spacers to be obtained, usually disposed around the gates of the transistors. These protections are only situated on the cutaway peripheral parts of the wafers. One drawback of this approach is that it is only applicable on edges that are cut away substantially vertically. In other words, if the edges are not cut perpendicular to the plane of the wafer, then the cut-away edges are generally sloping.